Electronic memory apparatuses, for example memory modules or superordinate structural units having a plurality of memory modules, usually have a plurality of identical memory devices that are arranged together in the electronic memory apparatus and are driven in a parallel manner to one another. These memory devices may be, for example, memory chips that are arranged on an electronic printed circuit board of a memory module. The memory chips may be, in particular, DRAMs (Dynamic Random Access Memories) or other types of volatile semiconductor memories.
In a volatile semiconductor memory, information that is stored in the memory cells is retained only for a limited period of time of at most a few hundred ms since leakage currents result in the loss of the memory information. In order to prevent this, the volatile memory cells are refreshed at regular intervals. In this case, the memory information is read out and is written back to the memory cells in amplified form. This refresh operation is usually carried out periodically, that is to say in successive equidistant time segments. The temporal interval between successive refresh operations on one and the same memory cell corresponds to the refresh time of each individual memory cell. The refresh time must be short enough to prevent a loss of data in the memory cell. In order to refresh the memory cell, a clock signal that causes memory cells to be refreshed is provided in the memory apparatus. The periodic clock signal is provided, for example, by a control unit of the memory apparatus. The memory apparatus transmits the clock signal to each of its memory devices, likewise using the control unit, for example. The clock signal causes memory contents of the volatile memory cells to be refreshed and should be distinguished from that clock signal at a considerably higher frequency, which is generated, overall, in order to operate the memory apparatus and indicates the highest possible clock rate. In contrast, the clock signal that is dealt with here and is used for the refresh operation has a considerably larger temporal period. The period of this clock signal is dimensioned such that all of the memory cells are periodically refreshed within the intended refresh time or in a shorter temporal interval.
The period of the clock signal is generally not identical to the refresh time of an individual memory cell. This is because respective groups of memory cells are successively refreshed, that is to say at different cycle times, to be precise in cyclical order, until, after the refresh time has elapsed, the memory cells that were refreshed first are refreshed again. The temporal period of the clock signal is thus an integer factor smaller than the refresh time of the individual memory cells.
The speed at which the memory cells lose their information depends on the temperature in the memory cell's surroundings. Memory cells in locally heated regions of the memory apparatus or of the respective memory device generally lose their information more quickly than memory cells that are operated in regions of the memory apparatus that have been heated to a lesser degree or are operated even at room temperature. As a result, the temporal interval between two successive refresh operations of a memory cell (that is to say the refresh time), which still just suffices to prevent a loss of data in the memory cell, is of a different magnitude from memory cell to memory cell and is essentially influenced by the local temperature.
However, an electronic memory apparatus having a plurality of identical memory devices is always operated, for reasons of operating economy, at a standard clock rate in order to give rise to refresh operations. A periodic clock signal, which is standard for all memory devices, is thus passed to these memory devices, which internally convert it into corresponding refresh operations. All of the memory chips of a memory module, of a PDA (Personal Digital Assistant), of a mobile radio or of another mobile electronic device are thus supplied with a standard refresh signal, for example. In the case of mobile devices, in particular, a temperature-controlled self-refresh TCSR (Temperature Compensated Self-Refresh), in which a clock signal having a suitable period is internally generated for the refresh operation in all of the memory devices, for example semiconductor memory chips, is also possible. In this case, a refresh signal, which is externally provided by the memory apparatus and is to be transmitted to each memory chip is dispensed with. If a temperature sensor is fitted in each memory chip (for instance a DRAM), it itself controls, when suitably calibrated, the temperature threshold values at which the refresh rate is increased or decreased. Even if no temperature sensors are present or connected, it is possible to externally prescribe the clock rate at which such a “self-refresh” of the individual memory chips is to take place.
However, during active operation of a memory apparatus, the temperature-controlled self-refresh mechanism is not important; all of the memory devices are then operated at the required refresh rate. If a memory controller knows the temperatures prevailing at the memory chips on the basis of sensor data, a refresh rate that is adapted in a manner dependent on the temperature can be determined for the clock signal and a clock signal that pulsates at a correspondingly faster or slower rate can be generated and passed to all of the memory chips. If the actual local temperature of the memory chips does not match the temperature detected by the control unit (or the memory controller), which is common, there is a risk of data being lost or a large amount of current is unnecessarily used for the refresh operation.
The above-mentioned control thus has the disadvantage that a standard periodic clock signal must always be provided for the refresh operation for all of the memory devices. Although the clock rate of this standard clock signal can be changed in a manner dependent on the temperature, it is still standard for all memory devices when restricted to a particular clock rate and thus does not take into account temperature fluctuations between the memory devices. Some memory devices that are cooler than others are thus refreshed at an unnecessarily high clock rate, for example, which leads to excessive power consumption. However, power-saving operation would be desirable especially in mobile devices. It is also disadvantageous that the clock rate of the standard clock signal for refreshing the memory device must be changed from the outside if faster or slower refreshing of the memory cells is desired. Operation with a temperature-independent period duration of a standard clock signal is thus conventionally impossible if the refresh times of the memory cells are intended to be capable of being varied in a manner dependent on the temperature.